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Showing posts with the label CXL

BWR Episode 15: IBM 1nm, Intel 18A-P, Qualcomm data-center roadmap, and more chip news

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So much to cover, we split this episode into two segments. Part one covers IBM's sub-1nm technology, Intel's 18A-P process announcement, and Qualcomm's data-center roadmap. Part two covers Etched, OpenAI Jalapeno, Upscale funding, Micron earnings, Oxmiq Labs, and "not dead yet" CXL.

BWR Episode 8: Nvidia@CES, Upscale AI, Marvell Xconn, RISC-V

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The latest episode of The Byrne-Wheeler Report covers a slew of deals from funding to outright acquisitions. In my coverage space, Upscale AI has raised another $200 million at a unicorn valuation. Marvell is acquiring CXL-switch startup Xconn Technologies. Joe and I discuss two announcements in the RISC-V arena. In case you're wondering about Episode 7, it was a special episode with guest Mike Demler discussing Nvidia's Christmas Eve $20 billion bombshell Groq deal.

White Paper: The Evolution of Memory Tiering at Scale

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With first-generation chips now available, the early hype around CXL is giving way to realistic performance expectations. At the same time, software support for memory tiering is advancing, building on prior work around NUMA and persistent memory. Finally, operators have deployed RDMA to enable storage disaggregation and high-performance workloads. Thanks to these advancements, main-memory disaggregation is now within reach.  Enfabrica sponsored the creation of this white paper, but the opinions and analysis are those of the author. Download the full  white paper  for free, no registration required.

CXL Chip Market Poised for Rapid Growth

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It's not often that we see a new interconnect come along that's a sure thing. By piggybacking on the PCI Express physical layer, however, CXL has become one of those rare birds. As is always the case with new technologies, it will take time for a multi-vendor ecosystem to mature. CXL offers many incremental steps along the architectural-evolution path, allowing the technology to ramp quickly while offering future iterations that enable truly composable systems. It All Starts with Server CPUs Although not officially launched, Intel's Sapphire Rapids is already shipping to early customers. Development platforms are also in partners' hands, enabling validation and testing of CXL components. AMD's Genoa is also about to launch with CXL support. The caveat for both vendors is that these first CPUs support only CXL 1.1, which lacks important features incorporated in the CXL 2.0 specification. Both versions ride atop PCIe Gen5, however, so the physical layer needn't ch...